Scalable and low power N.O.C design for reconfigurable system

von Mittal, Himani
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Mittal, Himani Scalable and low power N.O.C design for reconfigurable system
Mittal, Himani - Scalable and low power N.O.C design for reconfigurable system

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Beschreibung

A scalable and low power network on chip for reconfigurable router is proposed in this book. Verilog Hardware Description Language is used for the design entry of this router. For simulation and synthesis MODELSIM EDITION10.3 and XILINX ISE Design Suite 13.4 are used respectively. Five innovative routers and four links are designed and simulated, synthesized to get the desired results. In the first phase the proposed reconfigurable system routers provides the designing of the various innovative Routers (RRIE, HRRLPHP, EDEEHT, and SRRODFB) along with their performance comparison. In the second phase links are designed (HSLPL, LMSTRDP, LMRTP) using MUX gating and various encoding decoding techniques for reducing power along with their simulation results. Results obtained show less power consumption and less switching transactions as compared to original links.

Mitwirkende

Autor:
Mittal, Himani
Kumar, Yogendera

Weitere Informationen

Biografie:
Mittal, Himani
Dr. Himani Mittal is Associate Professor in J.S.S.Academy of Technical Education, NOIDA,U.P.,INDIA. She has done Ph.D in E&C engineering,B.Tech in E&C and M.Tech in V.L.S.I. Her field of interest is V.L.S.I design, semiconductor. She has many publications in national & international journals and conferences.
Sprache:
Englisch
Seitenanzahl:
216
Medientyp:
Taschenbuch
Verlag:
LAP Lambert Academic Publishing

Stammdaten

Produkttyp:
Taschenbuch
Verpackungsabmessungen:
0.22 x 0.15 x 0.012 m; 0.367 kg
GTIN:
09786139999620
DUIN:
22V6L3G8CN6
CHF 77.90
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